{"id":1208,"date":"2014-12-06T10:50:39","date_gmt":"2014-12-06T09:50:39","guid":{"rendered":"http:\/\/www.daqq.eu\/?p=1208"},"modified":"2014-12-06T10:52:42","modified_gmt":"2014-12-06T09:52:42","slug":"perspective-why-does-it-take-so-long-to-compile-fpga-projects","status":"publish","type":"post","link":"https:\/\/www.daqq.eu\/?p=1208","title":{"rendered":"Perspective - why does it take so long to compile FPGA projects"},"content":{"rendered":"<p>I recently started (again) to poke into FPGA devices. I remembered the most annoying thing about that development - it took so damn long to compile. But, when one takes into account how much the compiler (implementer, mapper, optimizer, whatever) has to take into account, then it's pretty amazing even small designs like mine don't take weeks to compile.<\/p>\n<p>Enjoy a gif I made on this occasion, it gives one some perspective...<\/p>\n<div id=\"attachment_1209\" style=\"width: 510px\" class=\"wp-caption alignnone\"><a href=\"http:\/\/www.daqq.eu\/wp-content\/uploads\/2014\/12\/Perspective2Small.gif\"><img loading=\"lazy\" decoding=\"async\" aria-describedby=\"caption-attachment-1209\" class=\"size-full wp-image-1209\" src=\"http:\/\/www.daqq.eu\/wp-content\/uploads\/2014\/12\/Perspective2Small.gif\" alt=\"That's a LOT of gates and wires\" width=\"500\" height=\"389\" \/><\/a><p id=\"caption-attachment-1209\" class=\"wp-caption-text\">That's a LOT of gates and wires<\/p><\/div>\n<div id=\"attachment_1211\" style=\"width: 1190px\" class=\"wp-caption alignnone\"><a href=\"http:\/\/www.daqq.eu\/wp-content\/uploads\/2014\/12\/Perspective2a.gif\"><img loading=\"lazy\" decoding=\"async\" aria-describedby=\"caption-attachment-1211\" class=\"size-full wp-image-1211\" src=\"http:\/\/www.daqq.eu\/wp-content\/uploads\/2014\/12\/Perspective2a.gif\" alt=\"Gates and wires - Now in HD!\" width=\"1180\" height=\"569\" \/><\/a><p id=\"caption-attachment-1211\" class=\"wp-caption-text\">Gates and wires - Now in HD!<\/p><\/div>\n","protected":false},"excerpt":{"rendered":"<p>I recently started (again) to poke into FPGA devices. I remembered the most annoying thing about that development - it took so damn long to compile. But, when one takes into account how much the compiler (implementer, mapper, optimizer, whatever) &hellip; <a href=\"https:\/\/www.daqq.eu\/?p=1208\">Continue reading <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[5,29],"tags":[40,41],"class_list":["post-1208","post","type-post","status-publish","format-standard","hentry","category-misc","category-thoughts","tag-fpga","tag-thoughts-2"],"_links":{"self":[{"href":"https:\/\/www.daqq.eu\/index.php?rest_route=\/wp\/v2\/posts\/1208","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.daqq.eu\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.daqq.eu\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.daqq.eu\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.daqq.eu\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=1208"}],"version-history":[{"count":2,"href":"https:\/\/www.daqq.eu\/index.php?rest_route=\/wp\/v2\/posts\/1208\/revisions"}],"predecessor-version":[{"id":1212,"href":"https:\/\/www.daqq.eu\/index.php?rest_route=\/wp\/v2\/posts\/1208\/revisions\/1212"}],"wp:attachment":[{"href":"https:\/\/www.daqq.eu\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=1208"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.daqq.eu\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=1208"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.daqq.eu\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=1208"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}